ATLAS —
Autonomous Telemetry Learning & Actuation System
ATLAS is a real-time racing telemetry model trained on Toyota GR86 track data. It predicts optimal throttle, brake, and steering commands from multi-sensor vehicle state inputs (IMU accelerations, wheel speeds, GPS position deltas, tire temperatures, brake pressures, throttle position, steering angle, and suspension travel) at sub-millisecond latency for closed-loop autonomous driving on production Hailo-10H silicon.
Abstract
Background
ATLAS (Autonomous Telemetry Learning and Actuation System) is a multi-scale depthwise temporal network trained on Toyota GR86 track data for real-time autonomous driving control. The model processes a 24-channel vehicle state vector (3-axis IMU, 4 wheel speeds, 4 tire temps, 4 brake pressures, throttle/brake/steering positions, GPS dx/dy/dz, 2 suspension sensors) and predicts optimal throttle, brake, and steering actuator commands at each control timestep.
Approach
Trained in AxonML on logged track telemetry from instrumented GR86 sessions. Compiled through DFC 5.3.0 targeting Hailo-10H. The multi-scale architecture uses 3 parallel temporal branches at different dilation rates (1x, 4x, 16x) to capture both immediate vehicle dynamics and longer-horizon trajectory planning, fused via learned cross-branch attention before the 3-head actuator output.
Results
On production Hailo-10H hardware, ATLAS achieves 1,767 FPS with 0.696 ms hardware latency and 1.262 ms end-to-end latency at 53.3 degrees C average die temperature. This represents a control rate of >1,700 Hz — far exceeding the 100 Hz minimum required for stable closed-loop vehicle control.
Conclusion
ATLAS demonstrates that real-time autonomous driving control is achievable on Hailo edge silicon with substantial headroom. The sub-millisecond HW latency enables integration into safety-critical control loops without dedicated FPGA or ASIC hardware.
| Model | ATLAS |
| Domain | Autonomous Racing / Vehicle Control |
| Architecture | Multi-Scale Depthwise Temporal Network |
| Target silicon | Hailo-10H |
| DFC compiler | 5.3.0 |
| Framework | AxonML v0.6 (pure-Rust, CUDA + CPU backends) |
| Author | Andrew Jewell Sr. · ORCID 0009-0005-2158-7060 |
| Organization | AutomataNexus LLC · Fort Wayne, Indiana |
Executive overview
ATLAS predicts optimal vehicle actuator commands from a 24-channel sensor state at >1,700 Hz on Hailo-10H, enabling closed-loop autonomous driving with sub-millisecond inference latency.
Network I/O
Input: 24-channel vehicle state vector (IMU 3-axis, 4 wheel speeds, 4 tire temperatures, 4 brake pressures, throttle/brake/steering positions, GPS deltas, suspension travel). Output: 3-channel actuator command (throttle 0-1, brake 0-1, steering -1 to +1).
Architecture
Multi-Scale Depthwise Temporal Network with 3 parallel branches and cross-branch attention fusion.
The ATLAS architecture processes the 24-channel vehicle state through three parallel temporal branches operating at different time scales: Branch A (dilation 1, 2, 4 — captures immediate dynamics like wheel slip and brake bite), Branch B (dilation 4, 8, 16 — captures mid-range dynamics like weight transfer and tire temperature evolution), and Branch C (dilation 16, 32, 64 — captures trajectory-level planning from GPS and cumulative state). Each branch contains 3 depthwise-separable convolution layers with batch normalization and ReLU gating. Branch outputs are concatenated and fused via a 1x1 convolution cross-attention layer, followed by a 3-head output: throttle (sigmoid), brake (sigmoid), and steering (tanh).
Compilation constraints
All AxonML models targeting Hailo silicon are compiled under fixed-function dataflow constraints: no dynamic control flow, no variable-length dimensions, all activations representable in INT8 after calibration.
Silicon performance
Measured on production Hailo-10H hardware via hailortcli run with real silicon profiling enabled.
| Metric | Measured Value |
|---|---|
| Throughput | 1,766.81 FPS |
| HW Latency (on-die) | 0.696 ms |
| Overall Latency (end-to-end) | 1.262 ms |
| Die Temperature (avg) | 53.3 °C |
| Quantization | INT8 (post-training, DFC calibration) |
| DFC Compiler | 5.3.0 |
| HailoRT | 5.3.0 |
| Target Silicon | Hailo-10H |
Deployment
Deployed as a single HEF binary on a Raspberry Pi 5 + Hailo-10H AI HAT+ mounted in the vehicle. No cloud connectivity required for inference.
| Target silicon | Hailo-10H |
| DFC compiler | 5.3.0 |
| Quantization | INT8 (post-training, track telemetry calibration) |
| Runtime | HailoRT (vendor runtime for PCIe dispatch) |
| Edge platform | Raspberry Pi 5 + Hailo AI HAT+ (vehicle-mounted) |
| Control rate | >1,700 Hz (exceeds 100 Hz minimum for stable control) |
Deployment
The HEF binary loads directly into the Hailo-10H dataflow engine. Each control cycle: read CAN bus sensors → format 24-channel input tensor → submit to HailoRT → read 3-channel actuator output → write CAN bus commands. Total loop latency under 2 ms including I/O.
References
- Jewell, A. (2026). AxonML: A Pure-Rust Deep Learning Framework for Edge Inference. AutomataNexus LLC.
- Hailo Technologies Ltd. (2024). Hailo Dataflow Compiler User Guide. DFC v5.3.0.
- Hailo Technologies Ltd. (2024). Hailo-10H Product Datasheet.
AutomataNexus LLC · Fort Wayne, Indiana · andrew.jewellsr@automatanexus.com
Andrew Jewell Sr. · ORCID 0009-0005-2158-7060
May 2026 · All rights reserved.