Aquilo —
Temporal Convolutional Chiller Controller
Aquilo optimizes chilled water plant efficiency by predicting optimal condenser water setpoints, chiller staging sequences, and variable-speed drive frequencies from real-time plant telemetry. Named for the Roman god of the north wind. Deployed on EdgeModels controllers at sites with central chiller plants.
Abstract
Background
Aquilo optimizes chilled water plant efficiency by predicting optimal condenser water setpoints, chiller staging sequences, and variable-speed drive frequencies from real-time plant telemetry. Named for the Roman god of the north wind. Deployed on EdgeModels controllers at sites with central chiller plants.
Approach
The model was trained in AxonML (a pure-Rust deep learning framework) and compiled through the Hailo Dataflow Compiler (DFC 3.33.1) targeting Hailo-8 silicon. Post-training INT8 quantization was applied during the DFC compilation pass with production telemetry calibration data. The resulting Hailo Executable Format (HEF) binary executes on Hailo’s fixed-function dataflow architecture with deterministic latency and zero framework overhead at the edge.
Results
On production hardware (Hailo-8 M.2 (P/N: HM218B1C2FAE, S/N: HLDDM2A234600289)), Aquilo achieves 11,596 FPS (hw_only) with 0.109 ms hardware latency at 2.14 W average power draw.
Conclusion
Aquilo is production-ready as a single HEF binary deployed to edge devices with no external dependencies beyond the HailoRT vendor runtime. The model meets real-time latency requirements for its target hvac optimization application.
| Model | Aquilo |
| Domain | HVAC Optimization |
| Architecture | Temporal Convolutional Chiller Controller |
| Target silicon | Hailo-8 |
| Measured on | Hailo-8 M.2 (P/N: HM218B1C2FAE, S/N: HLDDM2A234600289) |
| DFC compiler | 3.33.1 |
| Framework | AxonML v0.6 (pure-Rust, CUDA + CPU backends) |
| Author | Andrew Jewell Sr. · ORCID 0009-0005-2158-7060 |
| Organization | AutomataNexus LLC · Fort Wayne, Indiana |
Executive overview
Aquilo optimizes chilled water plant efficiency by predicting optimal condenser water setpoints, chiller staging sequences, and variable-speed drive frequencies from real-time plant telemetry. Named for the Roman god of the north wind. Deployed on EdgeModels controllers at sites with central chiller plants.
Network I/O
Input: 12-channel chiller plant telemetry vector. Output: 3-value optimization target (CW setpoint, stage command, VFD freq).
Architecture
Temporal Convolutional Chiller Controller
Multi-layer dilated causal convolution (6 layers, dilation factors 1/2/4/8/16/32) processing condenser water supply/return temperatures, chilled water supply/return, outdoor air enthalpy, building load signal, and current chiller staging. Channel expansion pattern: input→32→64→64→32→16→output. Skip connections between layers 1-3 and 4-6. Output head predicts optimal condenser water setpoint (continuous), next-stage chiller enable (binary), and VFD frequency target (continuous 20-60 Hz).
Compilation constraints
All AxonML models targeting Hailo silicon are compiled under the fixed-function dataflow constraints: no dynamic control flow, no variable-length dimensions, all activations representable in INT8 after calibration, and no operations requiring dedicated softmax hardware (replaced with ReLU gating or depthwise convolution equivalents where necessary).
Silicon performance
Measured on production hardware via hailortcli benchmark with 5-second sustained inference. Device: Hailo-8 M.2 (P/N: HM218B1C2FAE, S/N: HLDDM2A234600289).
| Metric | Measured Value |
|---|---|
| FPS (hw_only) | 11,596.50 |
| FPS (streaming) | 11,596.40 |
| HW Latency | 0.109000 ms |
| Power (streaming avg) | 2.14100 W |
| Power (streaming max) | 2.15000 W |
| Power (idle) | 0.74979 W |
| Quantization | INT8 (post-training, DFC calibration) |
| DFC Compiler | 3.33.1 |
| HailoRT | 4.20.0 |
| Measured On | Hailo-8 M.2 (P/N: HM218B1C2FAE, S/N: HLDDM2A234600289) |
Deployment
Deployed as a single HEF binary. No ONNX runtime, TensorFlow Lite, or Python inference stack required at the edge.
| Target silicon | Hailo-8 |
| Measured on | Hailo-8 M.2 (P/N: HM218B1C2FAE, S/N: HLDDM2A234600289) |
| DFC compiler | 3.33.1 |
| Quantization | INT8 (post-training, production telemetry calibration) |
| Runtime | HailoRT (vendor runtime) |
| Edge platform | Raspberry Pi 5 + Hailo AI HAT+ (M.2 Key M) |
Deployment procedure
Copy the .hef binary to the target device. hailortcli run loads the HEF directly into the Hailo-8 dataflow engine over PCIe. Inference begins immediately with deterministic per-frame latency. No model conversion, graph optimization, or warmup phase required.
References
- Jewell, A. (2026). AxonML: A Pure-Rust Deep Learning Framework for Edge Inference. AutomataNexus LLC. Technical whitepaper.
- Hailo Technologies Ltd. (2024). Hailo Dataflow Compiler User Guide. DFC v3.33.1.
- Hailo Technologies Ltd. (2024). Hailo-8 Product Datasheet.
AutomataNexus LLC · Fort Wayne, Indiana · andrew.jewellsr@automatanexus.com
Andrew Jewell Sr. · ORCID 0009-0005-2158-7060
May 2026 · All rights reserved.